Entrance of SK Hynix's Cheongju Plant 3.
(Photo: SK Hynix)

 

 

[Alpha Biz= Kim Jisun] SK hynix will introduce hybrid bonding technology in its next-generation high bandwidth memory (HBM), beginning with DRAMs stacked in 20 layers. Hybrid bonding directly connects semiconductor chips using copper-to-copper contact, eliminating the need for traditional micro bumps. This transition is expected to trigger a significant shift in manufacturing processes.



Lee Kang-wook, Vice President of SK hynix and head of HBM packaging technology development, announced the plan on April 17 during a semiconductor workshop titled "Enabling AI with Semiconductor Technology," hosted by the Institute of Electronics and Information Engineers (IEIE) in Gangnam, Seoul.



“Up to 16-layer HBM4, we believe conventional packaging methods are sufficient, and we’re planning to extend the use of the Mass Reflow Molded Underfill (MR-MUF) technology,” said Lee. “However, starting from 20-layer stacks, hybrid bonding will become the baseline.”



While SK hynix will continue to use MR-MUF—a method that connects DRAMs using micro bumps and fills the gaps with a liquid compound—for its sixth-generation HBM4 chips scheduled for mass production in the second half of this year, hybrid bonding will be necessary beyond 16 layers. As DRAM stacking increases to improve capacity and data processing speed, the physical thickness also increases, making traditional methods unsuitable.



Hybrid bonding, which eliminates bumps and reduces chip thickness, also lowers power consumption—making it a viable solution for higher layer integration.



SK hynix plans to partially introduce hybrid bonding in its upcoming seventh-generation HBM4E, set for mass production next year, and fully transition the process with the eighth-generation HBM5.

 

 

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